1. Field of the Invention
The invention relates to circuit boards (CBs), e.g., printed circuit boards, imprinted boards, and any other support substrate. More particularly, to an apparatus and method for improving alternate current (AC) coupling on CBs.
2. Description of the Related Art
CB designers often optimize signal trace and voltage reference plane design to enhance performance. In many instances, a need exists to enhance or strengthen AC coupling between two signal traces or conductors. This is particularly true when dealing with differential signals. For differential signals, strong AC coupling reduces cross talk and allows high frequency, low-noise, signaling at low voltage levels.
A plane split is another CB structure that benefits from strong AC coupling. A plane split is a discontinuity formed in a voltage reference plane (e.g., power or ground plane). A plane split is necessary to prevent short circuits in signals routed between signal layers formed on top and below the voltage reference planes. A split in the power or ground plane might adversely impact signal integrity (SI) and electromagnetic containment (EMC) on signal traces routed over the split on adjacent signal layers.
The AC coupling between two adjacent signal traces or planes is determined by the capacitance between them. The capacitance, in turn, is governed in part by the dielectric material used to provide direct current (DC) isolation between the traces. The capacitance is directly proportional to the dielectric constant k of the material between the traces. If k is large, so is the capacitance resulting in strong AC coupling between the adjacent traces.
FIG. 1A is a cross sectional view of two adjacent signal traces. FIG. 1B is a top down view of the traces shown in FIG. 1A. Referring to FIGS. 1A-B, traces 102 and 104 are each a dimension t thick. The trace 102 is separated from the trace 104 by a dimension d. The traces 102 and 104 are each a dimension L long. Equation 1 gives the capacitance between the traces 102 and 104.
                    C        =                              kA            d                    =                                    k              ⁡                              (                Lt                )                                      d                                              Equation        ⁢                                  ⁢        1            
In Equation 1, k is the dielectric constant of the material between the traces, A is the minimum overlapping surface area between the traces, and d is the dielectric thickness between the traces. The surface area A is alternately expressed as the product of the length L times the thickness t of the traces.
Typical CB designs use copper materials for the signal traces and voltage reference planes. And typical CB designs use a fiberglass mesh material, e.g., FR4, for the CB core. The electrical properties of these copper and fiberglass materials have been thoroughly studied and are well understood. Exclusively using copper materials for trace and reference plane design and fiberglass materials for CB cores results in limiting capacitance control to geometry. If the material used for the signal traces and core is fixed, trace geometry remains the sole manner of capacitance control.
Increased capacitance C increases AC coupling for differential signals. Increased capacitance C is obtained in a fixed material CB design by increasing the area A or by minimizing the distance d. Increasing the trace length L or the trace thickness t, in turn, increases the area A. The trace length L is usually limited by the CB's physical size that must fit within a predetermined space, e.g., in the palm of one's hand for a hand held personal digital assistant. And increasing the trace length L oftentimes adversely affects SI and EMC by increasing the inductance loop area.
Using thicker copper materials increases the trace thickness t. For example, the trace thickness t increases if 2-ounce copper is used instead of 1-ounce copper for the signal trace layer of the CB. Using thicker copper materials, however, increases system cost. Most CB designers, therefore, increase AC coupling by minimizing the distance d between adjacent traces. But current technologies only allow etching spaces d between adjacent copper traces of specified magnitudes. Further minimization of d requires more sophisticated, expensive, technology that, in turn, increases cost.
The same geometrical arguments for differential signals also hold for plane splits. Increasing the length of the split L is undesirable, since increasing the length of the split adversely affects SI and further complicates signal routing on adjacent layers. Increasing the thickness t by using thicker copper materials increases system cost as mentioned earlier. Minimizing split spacing d is one option for increasing AC coupling between CB layers. Another option is the use of stitching capacitors.
FIG. 2A is a cross sectional view of an exemplary CB 200 with a split 202. FIG. 2B is a top view of the CB 200. Referring to FIGS. 2A-B, the CB 200 includes a ground plane (or layer) 204 and voltage planes (or layers) 206 and 208. A plane split 202 exists between voltage planes 206 and 208. A signal 210 bridges or spans the split 202 as most clearly shown in FIG. 2B. A stitching capacitor 212 electrically couples the plane 208 to the plane 206 through vias 214. The stitching capacitor 212 provides AC coupling that reduces EM radiation at the split reducing, in turn, adverse SI and EMC. The addition of stitching capacitors, however, is costly. One stitching capacitor is required for each signal crossing a split. Thus, the CB component count increases, increasing cost. More components require additional CB real estate, also increasing cost.
Accordingly, a need remains for an apparatus and method for improving AC coupling between differential signal traces and signals routed over plane splits on circuit boards.